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The NS3300 is a series of chip products developed based on NSING security technology, targeting applications in IoT micro-authentication, accessories, consumables, and anti-counterfeiting. These chips assist users in operations such as identity recognition or accessory authentication, meeting the market demand for intellectual property protection. The chips achieve EAL4+ security level.
• Built-in Hardware Acceleration Engine:
- 163-bit Elliptic Curve Cryptography Algorithm (ECC163 2n field)
- 256-bit Elliptic Curve Digital Signature Algorithm (ECDSA256 p field)
- True Random Number Generator (TRNG)
- Challenge-response mechanism (host -> slave)
- Security library for easy integration on the host side
• Self-Destruct Function:
- Supports multiple self-destruct trigger conditions: self-destruct command, lifecycle counter zero, or ECC counter zero
• User Space:
- 1kBit user space for storing customer information
- Page-locking feature
- 100,000 erase/write cycles and 10-year data retention at 25℃
• Single-Wire Interfaces (SWI):
- Transmission rates up to 200 kBits/s
- Direct power supply or indirect power supply via SWI
- Supports CRC verification
- Communication library for easy integration on the host side
• Power Management:
- Direct or indirect power supply solutions
- Power on and off control through the SWI interface
- Power Down consumption: 1μA (Typ)
- Power Down wake-up time: 10ms
• Lifecycle Indicator:
- 24-bit counter
- Supports decrement or increment functions
- Initial value set by the customer
- Locking feature supported
• ECC Authentication Counter:
- 24-bit decrement counter
- Initial value set by the customer
- Locking feature supported
• Hardware Protection:
- Achieves EAL4+ security level
• 96-bit Unique Device ID
• Operating Conditions:
- Supply voltage range: 1.62V to 5.5V
- Temperature range: -40℃ to 85℃
• Package:
- FCDFN6 (1.5mm x 1.2mm)
• ESD:
- 8kV (HBM model), compliant with MIL-STD-883K / Method 3015.9
- 2kV (CDM model), compliant with ESDA/JEDEC JS-002-2018
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