1˵
     1TIM1 CH2ſTIM1 CH1TIM3 CH1 TIM3ſTIM4 CH1
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    KEIL MDK-ARM V5.34.0.0
    Ӳ 
        N32G05xϵУ
            N32G05xRBQ7_STB V1.0
        N32G05xϵУ
            N32G05xRBL7_STB V1.0
3ʹ˵
    ϵͳ:
        1ʱԴ
                    HSI=8M,SYS CLK=64M,TIM1 CLK=64M,TIM3 CLK=64M,TIM4 CLK=64M
        2˿ã
                    PA4ѡΪTIM1 CH1
                    PA6ѡΪTIM1 CH2
                    PA8ѡΪTIM3 CH1
                    PB6ѡΪTIM4 CH1						
        3TIM
                    TIM1 CH2 ſTIM1 CH1ſTIM3 CH1, TIM3ſTIM4 CH1
    ʹ÷
        1򿪵ģʽʾ߼ǹ۲TIM1 CH1,TIM3 CH1,TIM4 CH1Ĳ
        2TIM1 CH2ߵƽʱʼ͵ƽֹͣ
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1. Function description
     1. TIM1 CH2 gated TIM1 CH1 and TIM3 CH1,TIM3 gated TIM4 CH1
2. Use environment
	Software development environment: KEIL MDK-ARM V5.34.0.0
    Hardware development environment:
         N32G05x series:
            Developed based on the evaluation board N32G05xRBQ7_STB V1.0
         N32G05x series:
            Developed based on the evaluation board N32G05xRBL7_STB V1.0	
3. Instructions for use
    System Configuration;
        1. Clock source:
                    HSI=8M,SYS CLK=64M,TIM1 CLK=64M,TIM3 CLK=64M,TIM4 CLK=64M
        2. Port configuration:
                    PA4 is selected as TIM1 CH1 output
                    PA6 is selected as TIM1 CH2 output
                    PA8 is selected as TIM3 CH1 output
                    PB6 is selected as TIM4 CH1 output
         3. TIM:
                     TIM1 CH2 gated TIM1 CH1, gated TIM3 CH1.TIM3 gated TIM4 CH1
     Instructions:
         1. After compiling, turn on the debug mode, use an oscilloscope or logic analyzer to observe the waveforms of TIM1 CH1, TIM3 CH1, TIM4 CH1
         2. TIM1 CH2 high level timer starts counting, low level stops
4. Matters needing attention
     without
	