1˵
    1TIM1 CH3 CH3Nźÿ6ڸıһռձ
2ʹû
    KEIL MDK-ARM V5.34.0.0
    Ӳ 
        N32G05xϵУ
            N32G05xRBQ7_STB V1.0
        N32G05xϵУ
            N32G05xRBL7_STB V1.0
3ʹ˵
    ϵͳ:
        1ʱԴ
                    HSI=8M,SYS CLK=64M,TIM1 CLK=64M
        2˿ã
                    PA11ѡΪTIM1 CH3
                    PB15ѡΪTIM1 CH3N
        3TIM
                    TIM1 CH3 CH3Nÿ6ڴһDMA
        4DMA
                    DMA1_CH5ͨѭģʽ3SRC_Buffer[3]TIM1 CCDAT3Ĵ
    ʹ÷
        1򿪵ģʽʾ߼ǹ۲TIM1 CH3 CH3NĲ
        2TIM16ڸıһCH3 CH3Nռձȣѭı
4ע
    
	
	
	
1. Function description
    1. TIM1 CH3 CH3N complementary signal changes duty cycle every 6 cycles
2. Use environment
	Software development environment: KEIL MDK-ARM V5.34.0.0
    Hardware development environment:
         N32G05x series:
            Developed based on the evaluation board N32G05xRBQ7_STB V1.0
         N32G05x series:
            Developed based on the evaluation board N32G05xRBL7_STB V1.0	
3. Instructions for use
    System Configuration;
        1. Clock source:
            HSI=8M,SYS CLK=64M,TIM1 CLK=64M
        2. Port configuration:
            PA11 selected as TIM1 CH3 Output
            PB15 selected as TIM1 CH3N Output
        3. TIM:
            TIM1 CH3 CH3N complementary output triggers DMA transmission every 6 cycles
        4. DMA:
            DMA1_ CH5 Channel circular mode handling 3 half-Word SRC_ Buffer[3] variable to TIM1 CCDAT3 register
     Instructions:
         1. After compiling, turn on the debug mode, use an oscilloscope or logic analyzer to observe the waveform of TIM1 CH3 CH3N
         2. Change the duty cycle of CH3 and CH3N once in 6 cycles of TIM1, and change cyclically
4. Matters needing attention
    None