                           1˵
    1TIM14Ի
2ʹû
    KEIL MDK-ARM V5.34.0.0
    Ӳ 
        N32G05xϵУ
            N32G05xRBQ7_STB V1.0
        N32G05xϵУ
            N32G05xRBL7_STB V1.0
3ʹ˵
    ϵͳ:
        1ʱԴ
                    HSI=8M,SYS CLK=64M,TIM1 CLK=64M
        2˿ã
                    PA4ѡΪTIM1 CH1
                    PA6ѡΪTIM1 CH2
                    PA11ѡΪTIM1 CH3
                    PA10ѡΪTIM1 CH4
                    PA7ѡΪTIM1 CH1N
                    PB14ѡΪTIM1 CH2N
                    PB15ѡΪTIM1 CH3N
                    PB12ѡΪTIM1 CH4N	
                    PA5ѡΪɲ								
        3TIM
                    TIM1 4ԻPA5ɲ
    ʹ÷
        1򿪵ģʽʾ߼ǹ۲TIM1Ĳ
        2PA5Ϳɹ۲쵽4ԻPWMPA5PWMʧ
4ע
       ĬPA9,PA10ñӵNSLINK⴮ڣPA9PA10ڣ;εñ
	
	
	
1. Function description
     1. TIM1 outputs 4 complementary waveforms
2. Use environment
	Software development environment: KEIL MDK-ARM V5.34.0.0
    Hardware development environment:
         N32G05x series:
            Developed based on the evaluation board N32G05xRBQ7_STB V1.0
         N32G05x series:
            Developed based on the evaluation board N32G05xRBL7_STB V1.0	
3. Instructions for use
    System Configuration;
        1. Clock source:
                    HSI=8M,SYS CLK=64M,TIM1 CLK=64M
        2. Port configuration:
                    PA4 is selected as TIM1 CH1 output
                    PA6 is selected as TIM1 CH2 output
                    PA11 is selected as TIM1 CH3 output
                    PA10 is selected as TIM1 CH4 output
                    PA7 is selected as TIM1 CH1N output
                    PB14 is selected as TIM1 CH2N output
                    PB15 is selected as TIM1 CH3N output
                    PB12 is selected as TIM1 CH4N output
                    PA5 is selected as break input
         3. TIM:
                     TIM1 8-way complementary with dead zone, PA5 is brake input
     Instructions:
         1. After compiling, turn on the debug mode, and use an oscilloscope or logic analyzer to observe the waveform of TIM1
         2. When PA5 is low, 4 complementary PWM can be observed, and when PA5 is high, PWM disappears
4. Matters needing attention
        By default, the PA9 and PA10 jumper caps of the development board are connected to the virtual serial port of NSLINK. If PA9 and PA10 are not used as serial ports in the project, and are used for other purposes, the serial port jumper caps must be unplugged.
	