1˵
    1TIM1 һںͬʱıںռձ
2ʹû
      KEIL MDK-ARM V5.26.2.0
    Ӳ      N32L40XM-STB_V1.0
3ʹ˵
    ϵͳã
        1ʱԴ
            HSE=8M,PLL=64M,AHB=64M,APB1=16M,APB2=32M,TIM1 CLK=64M,DMA CLK=64M
        2˿ã
            PA8ѡΪTIM1 CH1
        3TIM
            TIM1 CH1 ڴDMA burst䣬AR,REPCNT,CCDAT1ĴıռձȺںظ
        4DMA
            DMA1_CH5ͨģʽ3SRC_Buffer[3]TIM1 DMAĴ
    ʹ÷
        1򿪵ģʽʾ߼ǹ۲TIM1 CH1Ĳ
        2TIM1ĵһڽ󣬺ĲΪDMA˵ĸıںռձȵĲ
4ע
    

1. Function description
     1. TIM1 changes the period and duty cycle at the same time after one period
2. Use environment
     Software development environment: KEIL MDK-ARM V5.26.2.0
     Hardware environment: Developed based on N32L40XM-STB_V1.0
3. Instructions for use
     System Configuration;
         1. Clock source:
             HSE=8M,PLL=64M,AHB=64M,APB1=16M,APB2=32M,TIM1 CLK=64M,DMA CLK=64M
         2. Port configuration:
             PA8 is selected as TIM1 CH1 output
         3. TIM:
             TIM1 CH1 output, cycle trigger DMA burst transfer, load AR, REPCNT, CCDAT1 register, change the duty cycle and cycle and repeat counter
         4. DMA:
             DMA1_CH5 channel in normal mode transfers 3 half-word SRC_Buffer[3] variables to the TIM1 DMA register
     Instructions:
         1. After compiling, turn on the debug mode, and use the oscilloscope or logic analyzer to observe the waveform of TIM1 CH1
         2. After the first cycle of TIM1 is over, the following waveforms are the waveforms of changing cycle and duty cycle of DMA transport
4. Matters needing attention
     without