/*****************************************************************************
 * Copyright (c) 2022, Nsing Technologies Pte. Ltd.
 *
 * All rights reserved.
 * ****************************************************************************
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 * modification, are permitted provided that the following conditions are met:
 *
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 * this list of conditions and the disclaimer below.
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/**
 * @file drv_spi.h
 * @author Nsing
 * @version V1.2.2
 *
 * @copyright Copyright (c) 2022, Nsing Technologies Pte. Ltd. All rights reserved.
 */

#ifndef N32L40X_SPI_H_INCLUDED
#define N32L40X_SPI_H_INCLUDED

#include "n32l40x.h"
#include "n32l40x_spi.h"
#include "rtconfig.h"

#ifdef RT_USING_SPI1
#define SPI1_SCK_PIN GPIO_PIN_5  /* PA.05 */
#define SPI1_SCK_GPIO_PORT GPIOA /* GPIOA */
#define SPI1_SCK_GPIO_CLK RCC_APB2_PERIPH_GPIOA
#define SPI1_MISO_PIN GPIO_PIN_6  /* PA.06 */
#define SPI1_MISO_GPIO_PORT GPIOA /* GPIOA */
#define SPI1_MISO_GPIO_CLK RCC_APB2_PERIPH_GPIOA
#define SPI1_MOSI_PIN GPIO_PIN_7  /* PA.07 */
#define SPI1_MOSI_GPIO_PORT GPIOA /* GPIOA */
#define SPI1_MOSI_GPIO_CLK RCC_APB2_PERIPH_GPIOA
#endif /* RT_USING_SPI1 */

#ifdef RT_USING_SPI2
#define SPI2_SCK_PIN GPIO_PIN_13 /* PB.13 */
#define SPI2_SCK_GPIO_PORT GPIOB /* GPIOB */
#define SPI2_SCK_GPIO_CLK RCC_APB2_PERIPH_GPIOB
#define SPI2_MISO_PIN GPIO_PIN_14 /* PB.14 */
#define SPI2_MISO_GPIO_PORT GPIOB /* GPIOB */
#define SPI2_MISO_GPIO_CLK RCC_APB2_PERIPH_GPIOB
#define SPI2_MOSI_PIN GPIO_PIN_15 /* PB.15 */
#define SPI2_MOSI_GPIO_PORT GPIOB /* GPIOB */
#define SPI2_MOSI_GPIO_CLK RCC_APB2_PERIPH_GPIOB
#endif /* RT_USING_SPI2 */

struct w25qxx_spi_cs
{
    GPIO_Module *GPIOx;
    uint32_t GPIO_Pin;
};

int rt_hw_spi_init(void);

#endif /* N32L40X_SPI_H_INCLUDED */
