1˵
    1LP SLEEPģʽĽ˳


2ʹû

    KEIL MDK-ARM V5.25

    Ӳ
        1N32L43XML-STB V1.0
        2MCUN32L436MBL7


3ʹ˵
    
    ϵͳã
        1ʱԴHSE+PLL
        2ʱƵʣ108MHz/0MHz
        3ã
            - ΪUSART1TXPA9  RXPA10:
            - λ8
            - ֹͣλ1
            - żУ飺
            - ʣ 115200 



    ʹ÷
        KEIL±¼壬ӵPCڹ塣ϵ󴮿ڴӡMCU Prepare Enter LP Sleep Mode Core Stop Run,
        MCULP SLEEPģʽںֹͣеԱС(198uA)»ѰPA0жϻMCUڴӡ:
        MCU Run In Run Mode Sysclock From PLL(108MHz) (520uA),ظʵ
        
                
            


4ע
    LP SLEEPģʽѺȽLP RUNLP RUN˳RUNģʽ



1. Function description
    1. Enter and exit LP SLEEP mode.

2. Use environment
    Software development environment: KEIL MDK-ARM V5.25
    Hardware environment:
	1. Development based on evaluation board N32G43XRL-STB V1.0
	2. MCU: N32G435RBL7

3. Instructions for use   
    System configuration;
	1. Clock source: HSE+PLL/MSI
	2. Clock frequency: 108MHz/0MHz
	3. Serial port configuration
	    - Serial port: USART1 (TX: PA9 RX: PA10) :
	    - Data bit: 8
	    - Stop bit: 1
	    - Parity check: None
	    - Baud rate: 115200
    Instructions:
	After compiling in KEIL, burn it to the evaluation board, connect ammeter in series, and connect the evaluation board with PC serial tool. After the system is powered on, the serial port displays "MCU Prepare Enter LP Sleep Mode Core Stop Run". When the MCU enters LP Sleep Mode, the kernel Stop current becomes smaller (about 198uA). Press the wake button PA0 to interrupt MCU and wake up. The serial port prints "MCU Run In Run Mode Sysclock From PLL(108MHz)", and the current increases (about 520uA), thus repeating the above experimental phenomenon.
            
4. Matters needing attention
    After waking up from LP SLEEP, the system enters LP RUN and exits the RUN mode from LP RUN

