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    1TIM1 4黥PWM
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      KEIL MDK-ARM V5.34.0.0
    Ӳ      N32G430C8L7_STB V1.0
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                    HSE=8M,PLL=128M,AHB=128M,APB2_CLK=64M,TIM1 CLK=128M                       
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                    PA8ѡΪTIM1 CH1
                    PA9ѡΪTIM1 CH2
                    PA10ѡΪTIM1 CH3
                    PB13ѡΪTIM1 CH1N
                    PB14ѡΪTIM1 CH2N
                    PB15ѡΪTIM1 CH3N
                    PA11ѡΪTIM1 CH4
                    PB2ѡΪTIM1 CH4N  
                    PB12ѡΪTIM1 ɲ                   
        3TIM
                    TIM18·PWMɲIOΪPB12               
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        1򿪵ģʽʾ߼ǹ۲TIM1ͨĲΡ
        2кPB12͵ƽʱԹ۲쵽4黥PWMΣPB12ߵƽʱûв
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     Ĭ£PA9PA10ñӵNSLINK⴮ж˿ڡPA9PA10δĿеĴж˿ڣ;εж˿ñ
     


1. Function description
    1. TIM1 outputs 4 complementary waveforms
2. Use environment
    Software development environment: KEIL MDK-ARM V5.34.0.0
    Hardware environment: Developed based on N32G430C8L7_STB V1.0
3. Instructions for use
    System Configuration;
        1. Clock source:
                    HSE=8M,PLL=128M,AHB=128M,APB2_CLK=64M,TIM1 CLK=128M
        2. Port configuration:
                    PA8 is selected as TIM1 CH1 output
                    PA9 is selected as TIM1 CH2 output
                    PA10 is selected as TIM1 CH3 output
                    PB13 is selected as TIM1 CH1N output
                    PB14 is selected as TIM1 CH2N output
                    PB15 is selected as TIM1 CH3N output
                    PA11 is selected as TIM1 CH4 output
                    PB2 is selected as TIM1 CH4N output
                    PB12 is selected as TIM1 Breakin input
        3. TIM:
                    TIM1 8-way complementary with dead zone, IOM brake
    Instructions:
        1. Open the debug mode after compiling, and observe the waveform of TIM1 with an oscilloscope or logic analyzer
        2. After the program runs, four sets of complementary PWM waveforms can be observed at low level of PB12, and there are no waveforms at high level of PB12
4. Matters needing attention
        By default, the PA9 and PA10 jumper caps of the development board are connected to the virtual serial port of NSLINK. If PA9 and PA10 are not used as serial ports in the project, and are used for other purposes, the serial port jumper caps must be unplugged.