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    1TIM3 TIM4TIM1¼
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      KEIL MDK-ARM V5.26.2.0
    Ӳ      N32G43XRL-STB_V1.0
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            HSE=8M,PLL=108M,AHB=108M,APB1=27M,APB2=54M,TIM1 CLK=108M,TIM3 CLK=54M,TIM4 CLK=54M
        2˿ã
            PA6ѡΪTIM3CH1
            PB6ѡΪTIM4CH1
            PA8ѡΪTIM1CH1
        3TIM
            TIM1 CH1 ڴTIM3 TIM4ſ
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        1򿪵ģʽʾ߼ǹ۲TIM1 CH1TIM3 CH1TIM4 CH1Ĳ
        2кTIM3 15TIM1TIM4 10TIM1
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1. Function description
     1. TIM3 TIM4 counts under the TIM1 cycle
2. Use environment
     Software development environment: KEIL MDK-ARM V5.26.2.0
     Hardware environment: Developed based on N32G43XRL-STB_V1.0
3. Instructions for use
     System Configuration;
         1. Clock source:
             HSE=8M, PLL=108M, AHB=108M, APB1=27M, APB2=54M, TIM1 CLK=108M, TIM3 CLK=54M, TIM4 CLK=54M
         2. Port configuration:
             PA6 is selected as the CH1 output of TIM3
             PB6 is selected as the CH1 output of TIM4
             PA8 is selected as the CH1 output of TIM1
         3. TIM:
             TIM1 CH1 periodically triggers the gating of TIM3 TIM4
     Instructions:
         1. After compiling, turn on the debug mode and use an oscilloscope or logic analyzer to observe the waveforms of TIM1 CH1, TIM3 CH1, and TIM4 CH1
         2. After the program runs, TIM3 15 times cycle TIM1, TIM4 10 times cycle TIM1
4. Matters needing attention
     without